MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 102

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Low-, medium- and high-density reset and clock control (RCC)
6.3.11
Table 15.
102/995
Offset
0x00C
0x000
0x004
0x008
0x010
RCC_APB2RSTR
RCC_APB1RSTR Reser
RCC_CFGR
Reset value
Reset value
Reset value
Reset value
Reset value
Register
RCC_CIR
Bits 23:2
RCC_CR
Bit 26 PINRSTF: PIN reset flag
Bit 25
Bit 24 RMVF: Remove reset flag
RCC register map
The following table gives the RCC register map and the reset values.
RCC register map and reset values
Bit 1 LSIRDY: Internal low-speed oscillator ready
Bit 0 LSION: Internal low-speed oscillator enable
Set by hardware when a reset from the NRST pin occurs.
Cleared by writing to the RMVF bit.
0: No reset from NRST pin occurred
1: Reset from NRST pin occurred
Reserved, always read as 0.
Set by software to clear the reset flags.
0: No effect
1: Clear the reset flags
Reserved, always read as 0.
Set and cleared by hardware to indicate when the internal RC 40 kHz oscillator is stable.
After the LSION bit is cleared, LSIRDY goes low after 3 internal RC 40 kHz oscillator clock
cycles.
0: Internal RC 40 kHz oscillator not ready
1: Internal RC 40 kHz oscillator ready
Set and cleared by software.
0: Internal RC 40 kHz oscillator OFF
1: Internal RC 40 kHz oscillator ON
ved
Reserved
Reserved
0
Reserved
0
0
MCO [2:0]
0
0
0
0
Reserved
0
0
0
0
Reserved
Doc ID 13902 Rev 9
0
0
PLLMUL[3:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ADC
0
0
0
PRE
[1:0]
0
0
0
0
HSICAL[7:0]
0
0
0
PPRE2
[2:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
PPRE1
[2:0]
Reserved
0
0
0
0
0
0
0
0
1
0
0
0
HPRE[3:0]
HSITRIM[4:0]
0
0
0
0
0
0
0
0
0
0
0
0
SWS
0
0
0
0
0
[1:0]
RM0008
0
0
0
0
1
0
0
0
[1:0]
SW
1
0
0
0
0

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