MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 210

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Analog-to-digital converter (ADC)
11.9
Note:
Note:
210/995
Dual ADC mode
In devices with two ADCs or more, dual ADC mode can be used (see
In dual ADC mode the start of conversion is triggered alternately or simultaneously by the
ADC1 master to the ADC2 slave, depending on the mode selected by the DUALMOD[2:0]
bits in the ADC1_CR1 register.
In dual mode, when configuring conversion to be triggered by an external event, the user
must set the trigger for the master only and set a software trigger for the slave to prevent
spurious triggers to start unwanted slave conversion. However, external triggers must be
enabled on both master and slave ADCs.
The following six possible modes are implemented:
It is also possible to use the previous modes combined in the following ways:
In dual ADC mode, to read the slave converted data on the master data register, the DMA
bit must be enabled even if it is not used to transfer converted regular channel data.
Injected simultaneous mode
Regular simultaneous mode
Fast interleaved mode
Slow interleaved mode
Alternate trigger mode
Independent mode
Injected simultaneous mode + Regular simultaneous mode
Regular simultaneous mode + Alternate trigger mode
Injected simultaneous mode + Interleaved mode
Doc ID 13902 Rev 9
Figure
32).
RM0008

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