MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 501

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
20.9.7
Note:
20.9.8
Note:
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Reserved
Bits 31:25
Bits 31:0 DATATIME: Data timeout period
Bits 24:0 DATALENGTH: Data length value
SDIO data timer register (SDIO_DTIMER)
Address offset: 0x24
Reset value: 0x0000 0000
The SDIO_DTIMER register contains the data timeout period, in card bus clock periods.
A counter loads the value from the SDIO_DTIMER register, and starts decrementing when
the data path state machine (DPSM) enters the Wait_R or Busy state. If the timer reaches 0
while the DPSM is in either of these states, the timeout status flag is set.
A data transfer must be written to the data timer register and the data length register before
being written to the data control register.
SDIO data length register (SDIO_DLEN)
Address offset: 0x28
Reset value: 0x0000 0000
The SDIO_DLEN register contains the number of data bytes to be transferred. The value is
loaded into the data counter when data transfer starts.
For a block data transfer, the value in the data length register must be a multiple of the block
size (see SDIO_DCTRL). A data transfer must be written to the data timer register and the
data length register before being written to the data control register.
Data timeout period expressed in card bus clock periods.
Reserved, always read as 0.
Number of data bytes to be transferred.
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Doc ID 13902 Rev 9
DATATIME
Secure digital input/output interface (SDIO)
DATALENGTH
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