MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 448

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Flexible static memory controller (FSMC)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bits 19:17 ECCPS: ECC page size.
Bits 16:13 TAR: ALE to RE delay.
Bits 12:9 TCLR: CLE to RE delay.
Bits 8:7
Bits 5:4 PWID: Databus width.
NAND Flash/PC Card controller registers
PC Card/NAND Flash control registers 2..4 (FSMC_PCR2..4)
Address offset: 0xA0000000 + 0x40 + 0x20 * (x – 1), x = 2..4
Reset value: 0x0000 0018
Bits 6 ECCEN: ECC computation logic enable bit
Bit 3 PTYP: Memory type.
Reserved
Note: SET is MEMSET or ATTSET according to the addressed space.
Note: SET is MEMSET or ATTSET according to the addressed space.
Defines the page size for the extended ECC:
000: 256 bytes
001: 512 bytes
010: 1024 bytes
011: 2048 bytes
100: 4096 bytes
101: 8192 bytes
Sets time from ALE low to RE low in number of AHB clock cycles (HCLK).
Time is: t_ar = (TAR + SET + 4) × THCLK where THCLK is the HCLK clock period
0000: 1 HCLK cycle (default)
1111: 16 HCLK cycles
Sets time from CLE low to RE low in number of AHB clock cycles (HCLK).
Time is t_clr = (TCLR + SET + 4) × THCLK where THCLK is the HCLK clock period
0000: 1 HCLK cycle (default)
1111: 16 HCLK cycles
Reserved.
0: ECC logic is disabled and reset (default after reset),
1: ECC logic is enabled.
Defines the external memory device width.
00: 8 bits (default after reset)
01: 16 bits (mandatory for PC Card)
10: reserved, do not use
11: reserved, do not use
Defines the type of device attached to the corresponding memory bank:
0: PC Card, CompactFlash, CF+ or PCMCIA
1: NAND Flash (default after reset)
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ECCPS
Doc ID 13902 Rev 9
TAR
TCLR
9
8
Res.
7
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6
5
PWID
4
3
2
RM0008
1
0