MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 294

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Advanced-control timers (TIM1&TIM8)
13.4
13.4.1
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15
14
Bits 15:10 Reserved, always read as 0
Bits 9:8 CKD[1:0]: Clock division
Bits 6:5 CMS[1:0]: Center-aligned mode selection
TIM1&TIM8 registers
Refer to
TIM1&TIM8 control register 1 (TIMx_CR1)
Address offset: 0x00
Reset value: 0x0000
Bit 7 ARPE: Auto-reload preload enable
Bit 4 DIR: Direction
Bit 3 OPM: One pulse mode
13
Reserved
Note: It is not allowed to switch from edge-aligned mode to center-aligned mode as long as
Note: This bit is read only when the timer is configured in Center-aligned mode or Encoder
Section 1.1 on page 37
This bit-field indicates the division ratio between the timer clock (CK_INT) frequency and the
dead-time and sampling clock (t
(ETR, TIx),
00: t
01: t
10: t
11: Reserved, do not program this value.
0: TIMx_ARR register is not buffered.
1: TIMx_ARR register is buffered.
00: Edge-aligned mode. The counter counts up or down depending on the direction bit
(DIR).
01: Center-aligned mode 1. The counter counts up and down alternatively. Output compare
interrupt flags of channels configured in output (CCxS=00 in TIMx_CCMRx register) are set
only when the counter is counting down.
10: Center-aligned mode 2. The counter counts up and down alternatively. Output compare
interrupt flags of channels configured in output (CCxS=00 in TIMx_CCMRx register) are set
only when the counter is counting up.
11: Center-aligned mode 3. The counter counts up and down alternatively. Output compare
interrupt flags of channels configured in output (CCxS=00 in TIMx_CCMRx register) are set
both when the counter is counting up or down.
0: Counter used as upcounter.
1: Counter used as downcounter.
0: Counter is not stopped at update event
1: Counter stops counting at the next update event (clearing the bit CEN).
12
DTS
DTS
DTS
the counter is enabled (CEN=1)
mode.
11
=t
=2*t
=4*t
CK_INT
CK_INT
CK_INT
10
rw
9
CKD[1:0]
Doc ID 13902 Rev 9
for a list of abbreviations used in register descriptions.
rw
8
DTS
ARPE
)used by the dead-time generators and the digital filters
rw
7
rw
6
CMS[1:0]
rw
5
DIR
rw
4
OPM
rw
3
URS
rw
2
UDIS
rw
1
RM0008
CEN
rw
0