MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 418

no-image

MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Flexible static memory controller (FSMC)
418/995
Mode 1 - SRAM/CRAM
Figure 162. Mode1 read accesses
Mode1 write accessesThe one HCLK cycle at the end of the write transaction helps
guarantee the address and data hold time after the NWE rising edge. Due to the presence
of this one HCLK cycle, the DATAST value must be greater than zero (DATAST > 0).
NBL[1:0]
D[15:0]
A[25:0]
NBL[1:0]
NEx
NWE
NOE
A[25:0]
D[15:0]
NEx
NWE
NOE
High
Doc ID 13902 Rev 9
(ADDSET +1)
HCLK cycles
(ADDSET +1)
HCLK cycles
Memory transaction
Memory transaction
(DATAST + 1)
HCLK cycles
data driven by FSMC
Data sampled
(DATAST + 1)
HCLK cycles
1HCLK
data driven
by memory
2 HCLK
cycles
Data strobe
ai14721c
ai14720c
RM0008

Related parts for MCBSTM32EXL