MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 237

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
12.3.5
12.3.6
Figure 46. Timing diagram for conversion with trigger disabled TEN = 0
DAC output voltage
Digital inputs are converted to output voltages on a linear conversion between 0 and V
The analog output voltages on each DAC channel pin are determined by the following
equation:
DAC trigger selection
If the TENx control bit is set, conversion can then be triggered by an external event (timer
counter, external interrupt line). The TSELx[2:0] control bits determine which out of 8 possi-
ble events will trigger conversion as shown in
Table 69.
Each time a DAC interface detects a rising edge on the selected timer TRGO output, or on
the selected external interrupt line 9, the last data stored into the DAC_DHRx register is
transferred into the DAC_DORx register. The DAC_DORx register is updated three APB1
cycles after the trigger occurs.
If the software trigger is selected, the conversion starts once the SWTRIG bit is set.
SWTRIG is reset by hardware once the DAC_DORx register has been loaded with the
DAC_DHRx register contents.
DACoutput
Timer 6 TRGO event
Timer 3 TRGO event in
connectivity line devices or
Timer 8 TRGO in high-density
devices
Timer 7 TRGO event
Timer 5 TRGO event
Timer 2 TRGO event
Timer 4 TRGO event
EXTI line9
SWTRIG
APB1_CLK
=
Source
DOR
External triggers
DHR
V
REF

DOR
------------- -
4095
Doc ID 13902 Rev 9
Internal signal from on-chip
timers
External pin
Software control bit
0x1AC
0x1AC
t
Type
SETTLING
Table
69.
Digital-to-analog converter (DAC)
Output voltage
available on DAC_OUT pin
TSEL[2:0]
000
001
010
011
100
101
110
111
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REF+
.