MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 108

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity line devices: reset and clock control (RCC)
7.2.1
108/995
Several prescalers allow the configuration of the AHB frequency, the high speed APB
(APB2) and the low speed APB (APB1) domains. The maximum frequency of the AHB and
the APB2 domains is 72 MHz. The maximum allowed frequency of the APB1 domain is
36 MHz.
All peripheral clocks are derived from the system clock (SYSCLK) except:
The RCC feeds the Cortex System Timer (SysTick) external clock with the AHB clock
(HCLK) divided by 8. The SysTick can work either with this clock or with the Cortex clock
(HCLK), configurable in the SysTick Control and Status Register. The ADCs are clocked by
the clock of the High Speed domain (APB2) divided by 2, 4, 6 or 8.
The timer clock frequencies are automatically fixed by hardware. There are two cases:
1.
2.
FCLK acts as Cortex™-M3 free running clock. For more details refer to the ARM Cortex™-
M3 Technical Reference Manual.
HSE clock
The high speed external clock signal (HSE) can be generated from two possible clock
sources:
The resonator and the load capacitors have to be placed as close as possible to the
oscillator pins in order to minimize output distortion and startup stabilization time. The
loading capacitance values must be adjusted according to the selected oscillator.
The Flash memory programming interface clock which is always the HSI clock
The USB OTG FS 48MHz clock which is derived from the PLL VCO clock
The I2S2 and I2S3 clocks which can also be derived from the PLL3 VCO clock
(selection by software)
The Ethernet MAC clocks (TX, RX and RMII) which are provided from the external
PHY. For further information on Ethernet configuration, please refer to
MII/RMII
if the APB prescaler is 1, the timer clock frequencies are set to the same frequency as
that of the APB domain to which the timers are connected.
otherwise, they are set to twice (×2) the frequency of the APB domain to which the
timers are connected.
HSE external crystal/ceramic resonator
HSE user external clock
selection.
Doc ID 13902 Rev 9
Section 27.4.4:
RM0008

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