MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 711
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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RM0008
Figure 265. OTG_FS controller block diagram
1. BIUS = bus interface unit, AIU = application interface unit, PFC = packet FIFO controller, MAC = media
The USB system features 1.25 Kbyte of dedicated RAM with a sophisticated FIFO control
mechanism. The packet FIFO controller (PFC) module in the OTG_FS Core organizes RAM
space into Tx-FIFOs into which the application pushes the data to be temporarily stored
before the USB transmission, and into a single Rx FIFO where the data received from the
USB are temporarily stored before retrieval (popped) by the application. The number of
instructed FIFOs and how these are architectured inside the RAM depends on the device’s
role. In peripheral mode an additional Tx-FIFO is instructed for each active IN endpoint. Any
FIFO size is software configured to better meet the application requirements.
access controller, WPC = wakeup and power controller, PIU = PHY interface unit, SIE = serial interface
engine.
PSRAM
Doc ID 13902 Rev 9
AHB slave interface
BIUS AHB slave
MAC
WPC
PIU
AIU
PFC
SIE
FS serial interface
USB on-the-go full-speed (OTG_FS)
ai15608
711/995
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