MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 394

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Real-time clock (RTC)
Note:
16.4.3
394/995
15
1
2
3
4
5
6
14
Bits 15:4 Reserved, forced by hardware to 0.
Bits 3:0 PRL[19:16]: RTC prescaler reload value high
The functions of the RTC are controlled by this control register. It is not possible to write to
the RTC_CR register while the peripheral is completing a previous write operation (flagged
by RTOFF=0, see
Any flag remains pending until the appropriate RTC_CR request bit is reset by software,
indicating that the interrupt request has been granted.
At reset the interrupts are disabled, no interrupt requests are pending and it is possible to
write to the RTC registers.
The OWF, ALRF, SECF and RSF bits are not updated when the APB1 clock is not running.
The OWF, ALRF, SECF and RSF bits can only be set by hardware and only cleared by
software.
If ALRF = 1 and ALRIE = 1, the RTC global interrupt is enabled. If EXTI Line 17 is also
enabled through the EXTI Controller, both the RTC global interrupt and the RTC Alarm
interrupt are enabled.
If ALRF = 1, the RTC Alarm interrupt is enabled if EXTI Line 17 is enabled through the EXTI
Controller in interrupt mode. When the EXTI Line 17 is enabled in event mode, a pulse is
generated on this line (no RTC Alarm interrupt generation).
RTC prescaler load register (RTC_PRLH / RTC_PRLL)
The Prescaler Load registers keep the period counting value of the RTC prescaler. They are
write-protected by the RTOFF bit in the RTC_CR register, and a write operation is allowed if
the RTOFF value is ‘1’.
RTC prescaler load register high (RTC_PRLH)
Address offset: 0x08
Write only (see
Reset value: 0x0000
13
These bits are used to define the counter clock frequency according to the following formula:
f
Caution: The zero value is not recommended. RTC interrupts and flags cannot be asserted
TR_CLK
12
= f
11
Section 16.3.4 on page
RTCCLK
correctly.
Section 16.3.4 on page
10
/(PRL[19:0]+1)
Reserved
9
Doc ID 13902 Rev 9
8
390)
7
390).
6
5
4
w
3
PRL[19:16]
w
2
w
1
RM0008
w
0

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