MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 306
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Advanced-control timers (TIM1&TIM8)
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Bits 15:12 IC2F: Input capture 2 filter
Bits 11:10 IC2PSC[1:0]: Input capture 2 prescaler
Bits 9:8 CC2S: Capture/Compare 2 selection
Bits 7:4 IC1F[3:0]: Input capture 1 filter
Bits 3:2 IC1PSC: Input capture 1 prescaler
Bits 1:0 CC1S: Capture/Compare 1 selection
Note: CC2S bits are writable only when the channel is OFF (CC2E = ‘0’ in TIMx_CCER).
Input capture mode
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC2 channel is configured as output.
01: CC2 channel is configured as input, IC2 is mapped on TI2.
10: CC2 channel is configured as input, IC2 is mapped on TI1.
11: CC2 channel is configured as input, IC2 is mapped on TRC. This mode is working only if an
internal trigger input is selected through TS bit (TIMx_SMCR register)
This bit-field defines the frequency used to sample TI1 input and the length of the digital filter applied
to TI1. The digital filter is made of an event counter in which N events are needed to validate a
transition on the output:
0000: No filter, sampling is done at f
0001: f
0010: f
0011: f
0100: f
0101: f
0110: f
0111: f
1000: f
1001: f
1010: f
1011: f
1100: f
1101: f
1110: f
1111: f
This bit-field defines the ratio of the prescaler acting on CC1 input (IC1).
The prescaler is reset as soon as CC1E=’0’ (TIMx_CCER register).
00: no prescaler, capture is done each time an edge is detected on the capture input.
01: capture is done once every 2 events.
10: capture is done once every 4 events.
11: capture is done once every 8 events.
Note: CC1S bits are writable only when the channel is OFF (CC1E = ‘0’ in TIMx_CCER).
SAMPLING
SAMPLING
SAMPLING
SAMPLING
SAMPLING
SAMPLING
SAMPLING
SAMPLING
SAMPLING
SAMPLING
SAMPLING
SAMPLING
SAMPLING
SAMPLING
SAMPLING
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC1 channel is configured as output.
01: CC1 channel is configured as input, IC1 is mapped on TI1.
10: CC1 channel is configured as input, IC1 is mapped on TI2.
11: CC1 channel is configured as input, IC1 is mapped on TRC. This mode is working only if
an internal trigger input is selected through TS bit (TIMx_SMCR register)
=f
=f
=f
=f
=f
=f
=f
=f
=f
=f
=f
=f
=f
=f
=f
CK_INT
CK_INT
CK_INT
DTS
DTS
DTS
DTS
DTS
DTS
DTS
DTS
DTS
DTS
DTS
DTS
/2, N=6.
/2, N=8.
/4, N=6.
/4, N=8.
/8, N=6.
/8, N=8.
/16, N=5.
/16, N=6.
/16, N=8.
/32, N=5.
/32, N=6.
/32, N=8.
, N=2.
, N=4.
, N=8.
Doc ID 13902 Rev 9
DTS
.
RM0008
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