MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 115

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
7.3.2
ADC PRE[1:0]
31
15
rw
Bits 31:27
30
14
rw
Reserved
Bits 15:8 HSICAL[7:0]: Internal high-speed clock calibration
Bits 7:3 HSITRIM[4:0]: Internal high-speed clock trimming
Clock configuration register (RCC_CFGR)
Address offset: 0x04
Reset value: 0x0000 0000
Access: 0  wait state  2, word, half-word and byte access
1 or 2 wait states inserted only if the access occurs during a clock source switch.
Bit 16 HSEON: External high-speed clock enable
Bit 2
Bit 1 HSIRDY: Internal high-speed clock ready flag
Bit 0 HSION: Internal high-speed clock enable
Reserved, always read as 0.
29
13
rw
PPRE2[2:0]
Set and cleared by software.
Cleared by hardware to stop the external 3-25MHz oscillator when entering Stop or Standby
mode. This bit can not be reset if the external 3-25 MHz oscillator is used directly or
indirectly as system clock or is selected to become the system clock.
0: HSE oscillator OFF
1: HSE oscillator ON
These bits are initialized automatically at startup.
These bits provide an additional user-programmable trimming value that is added to the
HSICAL[7:0] bits. It can be programmed to adjust to variations in voltage and temperature
that influence the frequency of the internal HSI RC.
The default value is 16, which, when added to the HSICAL value, should trim the HSI to 8
MHz ± 1%. The trimming step (F
steps.
Reserved, always read as 0.
Set by hardware to indicate that internal 8 MHz RC oscillator is stable. After the HSION bit is
cleared, HSIRDY goes low after 6 internal 8 MHz RC oscillator clock cycles.
0: Internal 8 MHz RC oscillator not ready
1: Internal 8 MHz RC oscillator ready
Set and cleared by software.
Set by hardware to force the internal 8 MHz RC oscillator ON when leaving Stop or Standby
mode or in case of failure of the external 3-25 MHz oscillator used directly or indirectly as
system clock. This bit can not be cleared if the internal 8 MHz RC is used directly or
indirectly as system clock or is selected to become the system clock.
0: Internal 8 MHz RC oscillator OFF
1: Internal 8 MHz RC oscillator ON
28
12
rw
27
rw
11
rw
26
rw
10
rw
MCO[3:0]
PPRE1[2:0]
25
rw
rw
9
Doc ID 13902 Rev 9
Connectivity line devices: reset and clock control (RCC)
24
rw
rw
8
hsitrim
Res.
23
rw
7
) is around 40 kHz between two consecutive HSICAL
OTGF
SPRE
22
rw
rw
HPRE[3:0]
6
21
rw
rw
5
PLLMUL[3:0]
20
rw
rw
4
19
rw
3
r
SWS[1:0]
18
rw
2
r
XTPRE
PLL
17
rw
rw
1
SW[1:0]
115/995
SRC
PLL
16
rw
rw
0