MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 774
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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USB on-the-go full-speed (OTG_FS)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
rw/
r/r
MCNT
w
rw/
r/r
w
Bits 30:29 MCNT: Multi count
Bit 28:19 PKTCNT: Packet count
Bits 18:0 XFRSIZ: Transfer size
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
OTG_FS device endpoint-x transfer size register (OTG_FS_DIEPTSIZx)
(x = 1..3, where x = Endpoint_number)
Address offset: 0x910 + (Endpoint_number × 0x20)
Reset value: 0x0000 0000
The application must modify this register before enabling the endpoint. Once the endpoint is
enabled using the Endpoint enable bit in the Device endpoint-x control registers (EPENA bit
in OTG_FS_DIEPCTLx), the core modifies this register. The application can only read this
register once the core has cleared the Endpoint enable bit.
Bit 31 Reserved
For periodic IN endpoints, this field indicates the number of packets that must be transmitted
per frame on the USB. The core uses this field to calculate the data PID for isochronous IN
endpoints.
Indicates the total number of USB packets that constitute the Transfer Size amount of data for
this endpoint.
This field is decremented every time a packet (maximum size or short packet) is read from the
TxFIFO.
This field contains the transfer size in bytes for the current endpoint. The core only interrupts
the application after it has exhausted the transfer size amount of data. The transfer size can be
set to the maximum packet size of the endpoint, to be interrupted at the end of each packet.
The core decrements this field every time a packet from the external memory is written to the
TxFIFO.
01: 1 packet
10: 2 packets
11: 3 packets
PKTCNT
Doc ID 13902 Rev 9
XFRSIZ
9
8
7
6
5
4
3
RM0008
2
1
0
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