MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 494
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Secure digital input/output interface (SDIO)
20.6
20.6.1
20.6.2
494/995
Table 149. R6 response (continued)
The card [23:8] status bits are changed when CMD3 is sent to an I/O-only card. In this case,
the 16 bits of response are the SD I/O-only values:
●
●
●
●
SDIO I/O card-specific operations
The following features are SD I/O-specific operations:
●
●
●
●
The SDIO supports these operations only if the SDIO_DCTRL[11] bit is set, except for read
suspend that does not need specific hardware implementation.
SDIO I/O read wait operation by SDIO_D2 signalling
It is possible to start the readwait interval before the first block is received: when the data
path is enabled (SDIO_DCTRL[0] bit set), the SDIO-specific operation is enabled
(SDIO_DCTRL[11] bit set), read wait starts (SDI0_DCTRL[10] =0 and SDI_DCTRL[8] =1)
and data direction is from card to SDIO (SDIO_DCTRL[1] = 1), the DPSM directly moves
from Idle to Readwait. In Readwait the DPSM drives SDIO_D2 to 0 after 2 SDIO_CK clock
cycles. In this state, when you set the RWSTOP bit (SDIO_DCTRL[9]), the DPSM remains
in Wait for two more SDIO_CK clock cycles to drive SDIO_D2 to 1 for one clock cycle (in
accordance with SDIO specification). The DPSM then starts waiting again until it receives
data from the card. The DPSM will not start a readwait interval while receiving a block even
if read wait start is set: the readwait interval will start after the CRC is received. The
RWSTOP bit has to be cleared to start a new read wait operation. During the readwait
interval, the SDIO can detect SDIO interrupts on SDIO_D1.
SDIO read wait operation by stopping SDIO_CK
If the SDIO card does not support the previous read wait method, the SDIO can perform a
read wait by stopping SDIO_CK (SDIO_DCTRL is set just like in the method presented in
Section
the end bit of the current received block and starts the clock again after the read wait start
bit is set.
[39:8] Argument
field
[7:1]
0
Bit [15] COM_CRC_ERROR
Bit [14] ILLEGAL_COMMAND
Bit [13] ERROR
Bits [12:0] Reserved
SDIO read wait operation by SDIO_D2 signalling
SDIO read wait operation by stopping the clock
SDIO suspend/resume operation (write and read suspend)
SDIO interrupts
20.6.1, but SDIO_DCTRL[10] =1): DSPM stops the clock two SDIO_CK cycles after
Bit position
[31:16]
[15:0]
Width (bits)
16
16
7
1
Doc ID 13902 Rev 9
X
X
X
1
Value
RCA [31:16] of winning card or of the host
Not defined. May be used for IRQ data
CRC7
End bit
Description
RM0008
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