MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 434

no-image

MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Flexible static memory controller (FSMC)
Figure 174. Synchronous multiplexed write mode - PSRAM (CRAM)
1. Memory must issue NWAIT signal one cycle in advance, accordingly WAITCFG must be programmed to 0.
2. Byte Lane (NBL) outputs are not shown, they are held low while NEx is active.
434/995
HCLK
CLK
A[25:16]
NEx
NOE
NWE
NADV
NWAIT
(WAITCFG = 0)
A/D[15:0]
Hi-Z
1 CLK
cycle
addr[25:16]
1 CLK
cycle
Addr[15:0]
DATALAT CLK cycles
Memory transaction = burst of 4 half words
data
Doc ID 13902 Rev 9
data
inserted wait state
data
data
ai14731c
RM0008

Related parts for MCBSTM32EXL