MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 735

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
RM0008
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
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Bit 31 WUIM: Resume/remote wakeup detected interrupt mask
Bit 30 SRQIM: Session request/new session detected interrupt mask
Bit 29 DISCINT: Disconnect detected interrupt mask
Bit 28 CIDSCHGM: Connector ID status change mask
Bit 27 Reserved
Bit 26 PTXFEM: Periodic TxFIFO empty mask
Bit 25 HCIM: Host channels interrupt mask
Bit 24 PRTIM: Host port interrupt mask
OTG_FS interrupt mask register (OTG_FS_GINTMSK)
Address offset: 0x018
Reset value: 0x0000 0000
This register works with the Core interrupt register to interrupt the application. When an
interrupt bit is masked, the interrupt associated with that bit is not generated. However, the
Core Interrupt (OTG_FS_GINTSTS) register bit corresponding to that interrupt is still set.
rw rw
Note: Accessible in both Host and Device modes.
Note: Accessible in both Host and Device modes.
Note: Accessible in both Host and Device modes.
Note: Accessible in both Host and Device modes.
Note: Only accessible in Host mode.
Note: Only accessible in Host mode.
Note: Only accessible in Host mode.
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
r
rw rw rw rw rw rw
Doc ID 13902 Rev 9
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USB on-the-go full-speed (OTG_FS)
9
8
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7
6
5
4
3
2
735/995
1
0

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