MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 460

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secure digital input/output interface (SDIO)
20.3.1
Note:
460/995
Table 120. SDIO I/O definitions
SDIO adapter
Figure 183
Figure 183. SDIO adapter
The SDIO adapter is a multimedia/secure digital memory card bus master that provides an
interface to a multimedia card stack or to a secure digital memory card. It consists of five
subunits:
The adapter registers and FIFO use the AHB bus clock domain (HCLK/2). The control unit,
command path and data path use the SDIO adapter clock domain (SDIOCLK).
Adapter register block
The adapter register block contains all system registers. This block also generates the
signals that clear the static flags in the multimedia card. The clear signals are generated
when 1 is written into the corresponding bit location in the SDIO Clear register.
SDIO_CK
SDIO_CMD
SDIO_D[7:0]
Adapter register block
Control unit
Command path
Data path
Data FIFO
To AHB
interface
Pin
shows a simplified block diagram of an SDIO adapter.
SDIO adapter
Output
Bidirectional
Bidirectional
Direction
Adapter
registers
HCLK/2
FIFO
Doc ID 13902 Rev 9
MultiMediaCard/SD/SDIO card clock. This pin is the clock from
host to card.
MultiMediaCard/SD/SDIO card command. This pin is the
bidirectional command/response signal.
MultiMediaCard/SD/SDIO card data. These pins are the
bidirectional databus.
Control unit
Command
Data path
SDIOCLK
path
Description
SDIO_CK
SDIO_CMD
SDIO_D[7:0]
ai14740
RM0008

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