MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 621

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
RM0008
Bit 5:4 I2SSTD: I2S standard selection
Bit 2:1 DATLEN: Data length to be transferred
Bit 7 PCMSYNC: PCM frame synchronization
Bit 6 Reserved: forced at 0 by hardware
Bit 3 CKPOL: Steady state clock polarity
Bit 0 CHLEN: Channel length (number of bits per audio channel)
Note: This bit has a meaning only if I2SSTD = 11 (PCM standard is used)
For more details on I
Note: For correct operation, these bits should be configured when the I
Note: For correct operation, this bit should be configured when the I
Note: For correct operation, these bits should be configured when the I
Note: For correct operation, this bit should be configured when the I
0: Short frame synchronization
1: Long frame synchronization
00: I
01: MSB justified standard (left justified)
10: LSB justified standard (right justified)
11: PCM standard
0: I
1: I
00: 16-bit data length
01: 24-bit data length
10: 32-bit data length
11: Not allowed
0: 16-bit wide
1: 32-bit wide
The bit write operation has a meaning only if DATLEN = 00 otherwise the channel length is fixed to
32-bit by hardware whatever the value filled in.
2
2
S clock steady state is low level
S clock steady state is high level
2
Not used for the SPI mode
Not used in SPI mode
Not used in SPI mode
Not used in SPI mode
Not used in SPI mode
S Phillips standard.
2
S standards, refer to
Doc ID 13902 Rev 9
Section 23.4.2 on page 600
Serial peripheral interface (SPI)
2
2
S is disabled.
S is disabled.
2
2
S is disabled.
S is disabled.
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