MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 190

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DMA controller (DMA)
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Figure 24. DMA2 request mapping
Table 58
Table 58.
1. ADC3, SDIO and TIM8 DMA requests are available only in high-density devices.
TIM7_UP/DAC_Channel2
DAC_Channel1
DAC_Channel2
TIM6_UP/DAC_Channel1
Peripherals
SPI/I2S3
ADC3
SDIO
TIM8
UART4
TIM6/
TIM7/
TIM5
Peripheral request signals
lists the DMA2 requests for each channel.
(1)
(1)
SPI/I2S3_RX
(1)
SPI/I2S3_TX
UART4_TX
TIM5_TRIG
TIM8_TRIG
TIM8_COM
TIM8_CH2
TIM5_CH1
UART4_RX
TIM8_CH3
TIM5_CH4
TIM8_CH4
TIM5_CH3
TIM5_CH2
TIM8_CH1
TIM8_UP
TIM5_UP
Summary of DMA2 requests for each channel
ADC3
SDIO
SPI/I2S3_RX
TIM5_TRIG
TIM5_CH4
TIM8_CH3
Channel 1
TIM8_UP
SW trigger (MEM2MEM bit)
SW trigger (MEM2MEM bit)
SW trigger (MEM2MEM bit)
SW trigger (MEM2MEM bit)
SW trigger (MEM2MEM bit)
Doc ID 13902 Rev 9
SPI/I2S3_TX
TIM8_TRIG
TIM8_COM
Channel 2
TIM5_CH3
TIM8_CH4
TIM5_UP
HW request 3
HW request 4
HW request 5
HW request 2
HW request 1
Channel 1 EN bit
Channel 4 EN bit
Channel 3 EN bit
Channel 5 EN bit
Channel 2 EN bit
DAC_Channel1
UART4_RX
Channel 3
TIM8_CH1
TIM6_UP/
Channel 1
Channel 3
Channel 4
Channel 2
Channel 5
DAC_Channel2
TIM5_CH2
Channel 4
TIM7_UP/
Fixed hardware priority
SDIO
HIGH PRIORITY
LOW PRIORITY
UART4_TX
TIM5_CH1
TIM8_CH2
Channel 5
ADC3
internal
request
DMA2
RM0008