MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 176

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Interrupts and events
9.2.4
9.2.5
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In connectivity line devices, Ethernet wakeup events also have the WFE wakeup capability.
To use an external line as a wakeup event, refer to
Functional description
To generate the interrupt, the interrupt line should be configured and enabled. This is done
by programming the two trigger registers with the desired edge detection and by enabling
the interrupt request by writing a ‘1’ to the corresponding bit in the interrupt mask register.
When the selected edge occurs on the external interrupt line, an interrupt request is
generated. The pending bit corresponding to the interrupt line is also set. This request is
reset by writing a ‘1’ in the pending register.
To generate the event, the event line should be configured and enabled. This is done by
programming the two trigger registers with the desired edge detection and by enabling the
event request by writing a ‘1’ to the corresponding bit in the event mask register. When the
selected edge occurs on the event line, an event pulse is generated. The pending bit
corresponding to the event line is not set
An interrupt/event request can also be generated by software by writing a ‘1’ in the software
interrupt/event register.
Hardware interrupt selection
To configure the 20 lines as interrupt sources, use the following procedure:
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Hardware event selection
To configure the 20 lines as event sources, use the following procedure:
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Software interrupt/event selection
The 20 lines can be configured as software interrupt/event lines. The following is the
procedure to generate a software interrupt.
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External interrupt/event line mapping
The 112 GPIOs are connected to the 16 external interrupt/event lines in the following
manner:
Configure the mask bits of the 20 Interrupt lines (EXTI_IMR)
Configure the Trigger Selection bits of the Interrupt lines (EXTI_RTSR and
EXTI_FTSR)
Configure the enable and mask bits that control the NVIC IRQ channel mapped to the
External Interrupt Controller (EXTI) so that an interrupt coming from one of the 20 lines
can be correctly acknowledged.
Configure the mask bits of the 20 Event lines (EXTI_EMR)
Configure the Trigger Selection bits of the Event lines (EXTI_RTSR and EXTI_FTSR)
Configure the mask bits of the 20 Interrupt/Event lines (EXTI_IMR, EXTI_EMR)
Set the required bit of the software interrupt register (EXTI_SWIER)
Doc ID 13902 Rev 9
Section 9.2.4: Functional
description.
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