MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 117
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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RM0008
Bits 14:14 ADCPRE[1:0]: ADC prescaler
Bits 13:11 PPRE2[2:0]: APB high-speed prescaler (APB2)
Bits 10:8 PPRE1[2:0]: APB Low-speed prescaler (APB1)
Bits 7:4 HPRE[3:0]: AHB prescaler
Bits 3:2 SWS[1:0]: System clock switch status
Caution: Software must configure these bits ensure that the frequency in this domain does not
Note: The prefetch buffer must be kept on when using a prescaler different from 1 on the AHB clock.
Set and cleared by software to select the frequency of the clock to the ADCs.
00: PLCK2 divided by 2
01: PLCK2 divided by 4
10: PLCK2 divided by 6
11: PLCK2 divided by 8
Set and cleared by software to control the division factor of the APB High speed clock (PCLK2).
0xx: HCLK not divided
100: HCLK divided by 2
101: HCLK divided by 4
110: HCLK divided by 8
111: HCLK divided by 16
Set and cleared by software to control the division factor of the APB Low speed clock (PCLK1).
0xx: HCLK not divided
100: HCLK divided by 2
101: HCLK divided by 4
110: HCLK divided by 8
111: HCLK divided by 16
Set and cleared by software to control AHB clock division factor.
0xxx: SYSCLK not divided
1000: SYSCLK divided by 2
1001: SYSCLK divided by 4
1010: SYSCLK divided by 8
1011: SYSCLK divided by 16
1100: SYSCLK divided by 64
1101: SYSCLK divided by 128
1110: SYSCLK divided by 256
1111: SYSCLK divided by 512
Set and cleared by hardware to indicate which clock source is used as system clock.
00: HSI oscillator used as system clock
01: HSE oscillator used as system clock
10: PLL used as system clock
11: Not applicable
Refer to the section
exceed 36 MHz.
Reading the Flash memory on page 47
Doc ID 13902 Rev 9
Connectivity line devices: reset and clock control (RCC)
for more details.
117/995
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