MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 247

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
12.5.2
12.5.3
31
15
31
15
30
14
30
14
Reserved
Bits 31:12 Reserved.
Bits 31:2 Reserved.
Bit 11:0 DACC1DHR[11:0]: DAC channel1 12-bit right-aligned data
DAC software trigger register (DAC_SWTRIGR)
Address offset: 0x04
Reset value: 0x0000 0000
DAC channel1 12-bit right-aligned data holding register
(DAC_DHR12R1)
Address offset: 0x08
Reset value: 0x0000 0000
Bit 0 EN1: DAC channel1 enable
Bit 1 SWTRIG2: DAC channel2 software trigger
Bit 0 SWTRIG1: DAC channel1 software trigger
29
13
29
13
Note: This bit is reset by hardware (one APB1 clock cycle later) once the DAC_DHR2 register
Note: This bit is reset by hardware (one APB1 clock cycle later) once the DAC_DHR1 register
These bits are written by software which specify 12-bit data for DAC channel1.
28
12
This bit set and cleared by software to enable/disable DAC channel1.
0: DAC channel1 disabled
1: DAC channel1 enabled
28
12
This bit is set and cleared by software to enable/disable the software trigger.
0: Software trigger disabled
1: Software trigger enabled
This bit is set and cleared by software to enable/disable the software trigger.
0: Software trigger disabled
1: Software trigger enabled
value is loaded to the DAC_DOR2 register.
value is loaded to the DAC_DOR1 register.
27
11
27
11
rw
26
10
26
10
rw
25
9
25
rw
9
Reserved
Doc ID 13902 Rev 9
24
8
24
rw
8
Reserved
Reserved
23
7
23
rw
7
DACC1DHR[11:0]
22
6
22
rw
6
21
5
21
rw
5
Digital-to-analog converter (DAC)
20
20
rw
4
4
19
19
rw
3
3
18
18
rw
2
2
SWTRI
G2
17
17
rw
w
1
1
247/995
SWTRI
G1
16
rw
16
w
0
0