MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 82
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Low-, medium- and high-density reset and clock control (RCC)
6.2.9
6.2.10
6.3
82/995
The LSE clock is in the Backup domain, whereas the HSE and LSI clocks are not.
Consequently:
●
●
●
Watchdog clock
If the Independent watchdog (IWDG) is started by either hardware option or software
access, the LSI oscillator is forced ON and cannot be disabled. After the LSI oscillator
temporization, the clock is provided to the IWDG.
Clock-out capability
The microcontroller clock output (MCO) capability allows the clock to be output onto the
external MCO pin. The configuration registers of the corresponding GPIO port must be
programmed in alternate function mode. One of 4 clock signals can be selected as the MCO
clock.
●
●
●
●
The selection is controlled by the MCO[2:0] bits of the
(RCC_CFGR).
RCC registers
Refer to
If LSE is selected as RTC clock:
–
If LSI is selected as Auto-Wakeup unit (AWU) clock:
–
If the HSE clock divided by 128 is used as the RTC clock:
–
–
SYSCLK
HSI
HSE
PLL clock divided by 2
Section 1.1 on page 37
The RTC continues to work even if the V
V
The AWU state is not guaranteed if the V
Section 6.2.5: LSI clock on page 80
The RTC state is not guaranteed if the V
voltage regulator is powered off (removing power from the 1.8 V domain).
The DPB bit (Disable backup domain write protection) in the Power controller
register must be set to 1 (refer to
(PWR_CR)).
BAT
supply is maintained.
Doc ID 13902 Rev 9
for a list of abbreviations used in register descriptions.
Section 4.4.1: Power control register
for more details on LSI calibration.
DD
DD
DD
supply is powered off or if the internal
supply is switched off, provided the
supply is powered off. Refer to
Clock configuration register
RM0008
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