MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 726
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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USB on-the-go full-speed (OTG_FS)
726/995
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bits 31:20 Reserved.
Bits 6:1 Reserved.
OTG_FS AHB configuration register (OTG_FS_GAHBCFG)
Address offset: 0x008
Reset value: 0x0000 0000
This register can be used to configure the core after power-on or a change in mode. This
register mainly contains AHB system-related configuration parameters. Do not change this
register after the initial programming. The application must program this register before
starting any transactions on either the AHB or the USB.
Bit 8 PTXFELVL: Periodic TxFIFO empty level
Bit 7 TXFELVL: TxFIFO empty level
Bit 0 GINT: Global interrupt mask
Indicates when the periodic TxFIFO empty interrupt bit in the Core interrupt register (PTXFE bit
in OTG_FS_GINTSTS) is triggered.
Note: Only accessible in Host mode.
In device mode, this bit indicates when IN endpoint Transmit FIFO empty interrupt (TXFE in
OTG_FS_DIEPINTx.) is triggered.
Note: Only accessible in Device mode.
The application uses this bit to mask? or unmask the interrupt line assertion to itself.
Irrespective of this bit’s setting, the interrupt status registers are updated by the core.
Note: Accessible in both Device and Host modes.
0: PTXFE (in OTG_FS_GINTSTS) interrupt indicates that the Periodic TxFIFO is half empty
1: PTXFE (in OTG_FS_GINTSTS) interrupt indicates that the Periodic TxFIFO is completely
empty
0: TXFE (in OTG_FS_DIEPINTx) interrupt indicates that the IN Endpoint TxFIFO is half
empty
1: TXFE (in OTG_FS_DIEPINTx) interrupt indicates that the IN Endpoint TxFIFO is
completely empty
0: Mask the interrupt assertion to the application.
1: Unmask the interrupt assertion to the application.
Reserved
Doc ID 13902 Rev 9
9
rw rw
8
7
6
5
Reserved
4
3
RM0008
2
1
rw
0
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