MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 150

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

General-purpose and alternate-function I/Os (GPIOs and AFIOs)
8.2.4
8.2.5
150/995
ODR15 ODR14 ODR13 ODR12 ODR11 ODR10
BR15
BS15
31
15
rw
31
15
w
w
BR14
BS14
Bits 31:16
30
14
30
14
Bits 31:16 BRy: Port x Reset bit y (y= 0 .. 15)
rw
w
w
Bits 15:0 ODRy[15:0]: Port output data (y= 0 .. 15)
Bits 15:0 BSy: Port x Set bit y (y= 0 .. 15)
Port output data register (GPIOx_ODR) (x=A..G)
Address offset: 0x0C
Reset value: 0x0000 0000
Port bit set/reset register (GPIOx_BSRR) (x=A..G)
Address offset: 0x10
Reset value: 0x0000 0000
BR13
BS13
29
13
29
13
rw
w
w
Note: For atomic bit set/reset, the ODR bits can be individually set and cleared by writing to
Note: If both BSx and BRx are set, BSx has priority.
Reserved, always read as 0.
These bits can be read and written by software and can be accessed in Word mode only.
BR12
BS12
These bits are write-only and can be accessed in Word mode only.
0: No action on the corresponding ODRx bit
1: Reset the corresponding ODRx bit
These bits are write-only and can be accessed in Word mode only.
0: No action on the corresponding ODRx bit
1: Set the corresponding ODRx bit
28
12
28
12
rw
w
w
the GPIOx_BSRR register (x = A .. G).
BR11
BS11
27
11
rw
27
11
w
w
BR10
BS10
26
10
rw
26
10
w
w
ODR9
BR9
BS9
25
rw
25
w
w
9
9
Doc ID 13902 Rev 9
ODR8
BR8
BS8
24
24
Reserved
rw
w
w
8
8
ODR7
BR7
BS7
23
23
rw
w
w
7
7
ODR6
BR6
BS6
22
22
rw
w
w
6
6
ODR5
BR5
BS5
21
21
rw
w
w
5
5
ODR4
BR4
BS4
20
20
rw
w
w
4
4
ODR3
BR3
BS3
19
19
rw
w
w
3
3
ODR2
BR2
BS2
18
18
rw
w
w
2
2
ODR1
BR1
BS1
17
17
rw
w
w
1
1
RM0008
ODR0
BR0
BS0
16
rw
16
w
w
0
0