MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 505

no-image

MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
RM0008
20.9.12
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bits 31:24
Bits 21:11
Reserved
SDIO interrupt clear register (SDIO_ICR)
Address offset: 0x38
Reset value: 0x0000 0000
The SDIO_ICR register is a write-only register. Writing a bit with 1b clears the
corresponding bit in the SDIO_STA Status register.
Bit 23 CEATAENDC: CEATAEND flag clear bit
Bit 22 SDIOITC: SDIOIT flag clear bit
Bit 10 DBCKENDC: DBCKEND flag clear bit
Bit 9 STBITERRC: STBITERR flag clear bit
Bit 8 DATAENDC: DATAEND flag clear bit
Bit 4 TXUNDERR: Transmit FIFO underrun error
Bit 3 DTIMEOUT: Data timeout
Bit 2 CTIMEOUT: Command response timeout
Bit 1 DCRCFAIL: Data block sent/received (CRC check failed)
Bit 0 CCRCFAIL: Command response received (CRC check failed)
Reserved, always read as 0.
Set by software to clear the CEATAEND flag.
0: CEATAEND not cleared
1: CEATAEND cleared
Set by software to clear the SDIOIT flag.
0: SDIOIT not cleared
1: SDIOIT cleared
Reserved, always read as 0.
Set by software to clear the DBCKEND flag.
0: DBCKEND not cleared
1: DBCKEND cleared
Set by software to clear the STBITERR flag.
0: STBITERR not cleared
1: STBITERR cleared
Set by software to clear the DATAEND flag.
0: DATAEND not cleared
1: DATAEND cleared
The Command TimeOut period has a fixed value of 64 SDIO_CK clock periods.
rw rw
Doc ID 13902 Rev 9
Reserved
Secure digital input/output interface (SDIO)
rw rw rw rw rw rw rw rw rw rw rw
9
8
7
6
5
4
3
2
505/995
1
0

Related parts for MCBSTM32EXL