MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 691

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
25.6.7
31
15
rw
30
14
rw
Bits 31:16 Reserved, forced by hardware to 0.
Bits 15:8 GT[7:0]: Guard time value
Guard time and prescaler register (USART_GTPR)
Address offset: 0x18
Reset value: 0x0000
Bit 4 NACK: Smartcard NACK enable
Bit 3 HDSEL: Half-duplex selection
Bit 2 IRLP: IrDA low-power
Bit 1 IREN: IrDA mode enable
Bit 0 EIE: Error interrupt enable
29
13
rw
Note: This bit is not available for UART4 & UART5.
Note: This bit is not available for UART4 & UART5.
This bit-field gives the Guard time value in terms of number of baud clocks.
This is used in Smartcard mode. The Transmission Complete flag is set after this guard time
value.
0: NACK transmission in case of parity error is disabled
1: NACK transmission during parity error is enabled
Selection of Single-wire Half-duplex mode
0: Half duplex mode is not selected
1: Half duplex mode is selected
This bit is used for selecting between normal and low-power IrDA modes
0: Normal mode
1: Low-power mode
This bit is set and cleared by software.
0: IrDA disabled
1: IrDA enabled
Error Interrupt Enable Bit is required to enable interrupt generation in case of a framing
error, overrun error or noise error (FE=1 or ORE=1 or NE=1 in the USART_SR register) in
case of Multi Buffer Communication (DMAR=1 in the USART_CR3 register).
0: Interrupt is inhibited
1: An interrupt is generated whenever DMAR=1 in the USART_CR3 register and FE=1 or
ORE=1 or NE=1 in the USART_SR register.
28
12
rw
GT[7:0]
27
11
rw
Universal synchronous asynchronous receiver transmitter (USART)
26
10
rw
25
rw
9
Doc ID 13902 Rev 9
24
rw
8
Reserved
23
rw
7
22
rw
6
21
rw
5
20
rw
4
PSC[7:0]
19
rw
3
18
rw
2
17
rw
1
691/995
16
rw
0