MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 592

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Serial peripheral interface (SPI)
592/995
Figure 210. Data clock timing diagram
1. These timings are shown with the LSBFIRST bit reset in the SPI_CR1 register.
Data frame format
Data can be shifted out either MSB-first or LSB-first depending on the value of the
LSBFIRST bit in the SPI_CR1 Register.
Each data frame is 8 or 16 bits long depending on the size of the data programmed using
the DFF bit in the SPI_CR1 register. The selected data frame format is applicable for
transmission and/or reception.
(from slave)
(from master)
(from slave)
(to slave)
(to slave)
(from master)
CPOL = 0
CPOL = 1
MISO
MOSI
Capture strobe
CPOL = 1
MISO
MOSI
NSS
Capture strobe
CPOL = 0
NSS
Note: These timings are shown with the LSBFIRST bit reset in the SPI_CR1 register.
MSBit
MSBit
MSBit
MSBit
8 or 16 bits depending on Data Frame Format (see SPI_CR1)
8 or 16 bits depending on Data Frame Format (see SPI_CR1)
Doc ID 13902 Rev 9
CPHA =0
CPHA =1
LSBit
LSBit
LSBit
LSBit
RM0008

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