MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 598

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Serial peripheral interface (SPI)
23.3.9
Note:
23.3.10
23.4
23.4.1
598/995
CRC error
This flag is used to verify the validity of the value received when the CRCEN bit in the
SPI_CR1 register is set. The CRCERR flag in the SPI_SR register is set if the value
received in the shift register (after transmission of the transmitter SPI_TXCRCR value) does
not match the receiver SPI_RXCRCR value.
Disabling the SPI
When transfer is terminated, the application can stop the communication by disabling the
SPI peripheral. This is done by resetting the SPE bit. Disabling the SPI peripheral while the
last data transfer is still ongoing does not affect the data reliability if the device is not in
Master transmit mode.
In Master transmit mode (full-duplex or simplex transmit only), the application must make
sure that no data transfer is ongoing by checking the BSY flag in the SPI_SR register before
disabling the SPI master.
SPI interrupts
Table 165. SPI interrupt requests
I
The I
concerns only high-density and connectivity line devices.
General description
The block diagram of the I
Transmit buffer empty flag
Receive buffer not empty flag
Master Mode fault event
Overrun error
CRC error flag
2
S functional description
2
S audio protocol is not available in low- and medium-density devices. This section
Interrupt event
2
S is shown in
Doc ID 13902 Rev 9
Figure
211.
Event flag
CRCERR
MODF
RXNE
OVR
TXE
Enable Control bit
RXNEIE
ERRIE
TXEIE
RM0008

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