MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 640

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Inter-integrated circuit (I
Note:
24.5
640/995
1
2
Table 171. I
SB, ADDR, ADD10, STOPF, BTF, RxNE and TxE are logically ORed on the same interrupt
channel.
BERR, ARLO, AF, OVR, PECERR, TIMEOUT and SMBALERT are logically ORed on the
same interrupt channel.
Figure 237. I
I
When the microcontroller enters the debug mode (Cortex-M3 core halted), the SMBUS
timeout either continues to work normally or stops, depending on the
Bus error
Arbitration loss (Master)
Acknowledge failure
Overrun/Underrun
PEC error
Timeout/Tlow error
SMBus Alert
2
C debug mode
TIMEOUT
PECERR
SMBAlert
ITBUFEN
BERR
ADD10
STOPF
ARLO
ADDR
OVR
RxNE
TxE
AF
BTF
SB
2
2
2
C) interface
C Interrupt requests (continued)
C interrupt mapping diagram
Interrupt event
Doc ID 13902 Rev 9
ITEVFEN
ITERREN
SMBALERT
Event flag
TIMEOUT
PECERR
BERR
ARLO
OVR
AF
Enable Control bit
ITERREN
it_event
it_error
RM0008

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