MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 189

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
Table 57.
Note:
Peripherals Channel 1
USART
SPI/I
ADC1
TIM1
TIM2
TIM3
TIM4
I
2
C
2
S
Summary of DMA1 requests for each channel
DMA2 controller
The 5 requests from the peripherals (TIMx[5,6,7,8], ADC3, SPI/I2S3, UART4,
DAC_Channel[1,2]and SDIO) are simply logically ORed before entering to the DMA2, this
means that only one request must be enabled at a time. Refer to
mapping.
The peripheral DMA requests can be independently activated/de-activated by programming
the DMA control bit in the registers of the corresponding peripheral.
The DMA2 controller and its relative requests are available only in high-density and
connectivity line devices.
TIM2_CH3
TIM4_CH1
ADC1
USART3_TX USART3_RX USART1_TX USART1_RX USART2_RX USART2_TX
Channel 2
TIM1_CH1
TIM3_CH3
TIM2_UP
SPI1_RX
Channel 3
TIM1_CH2
TIM3_CH4
TIM3_UP
SPI1_TX
Doc ID 13902 Rev 9
SPI/I2S2_RX SPI/I2S2_TX
TIM1_TRIG
TIM1_COM
TIM1_CH4
TIM4_CH2
Channel 4
I2C2_TX
TIM2_CH1
TIM4_CH3
Channel 5
TIM1_UP
I2C2_RX
Figure 24: DMA2 request
TIM3_TRIG
TIM1_CH3
TIM3_CH1
Channel 6
I2C1_TX
DMA controller (DMA)
Channel 7
TIM2_CH2
TIM2_CH4
TIM4_UP
I2C1_RX
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