MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 368

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

General-purpose timer (TIMx)
Input capture mode
14.4.9
368/995
15
Reserved
14
Bits 15:14 Reserved, always read as 0.
Bits 11:10 Reserved, always read as 0.
Bits 15:12 IC4F: Input capture 4 filter
Bits 11:10 IC4PSC: Input capture 4 prescaler
Bits 7:6 Reserved, always read as 0.
Bits 9:8 CC4S: Capture/Compare 4 selection
Bits 7:4 IC3F: Input capture 3 filter
Bits 3:2 IC3PSC: Input capture 3 prescaler
Bits 1:0 CC3S: Capture/Compare 3 selection
TIMx capture/compare enable register (TIMx_CCER)
Address offset: 0x20
Reset value: 0x0000
Bit 13 CC4P: Capture/Compare 4 output polarity
Bit 12 CC4E: Capture/Compare 4 output enable
Bit 9 CC3P: Capture/Compare 3 output polarity
Bit 8 CC3E: Capture/Compare 3 output enable
Bit 5 CC2P: Capture/Compare 2 output polarity
CC4P
13
rw
Note: CC4S bits are writable only when the channel is OFF (CC4E = ’0’ in TIMx_CCER).
Note: CC3S bits are writable only when the channel is OFF (CC3E = ’0’ in TIMx_CCER).
CC4E
refer to CC1P description
refer to CC1E description
refer to CC1P description
refer to CC1E description
refer to CC1P description
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC4 channel is configured as output.
01: CC4 channel is configured as input, IC4 is mapped on TI4.
10: CC4 channel is configured as input, IC4 is mapped on TI3.
11: CC4 channel is configured as input, IC4 is mapped on TRC. This mode is working only
if an internal trigger input is selected through TS bit (TIMx_SMCR register)
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC3 channel is configured as output.
01: CC3 channel is configured as input, IC3 is mapped on TI3.
10: CC3 channel is configured as input, IC3 is mapped on TI4.
11: CC3 channel is configured as input, IC3 is mapped on TRC. This mode is working only
if an internal trigger input is selected through TS bit (TIMx_SMCR register)
12
rw
11
Reserved
10
CC3P
rw
9
Doc ID 13902 Rev 9
CC3E
rw
8
7
Reserved
6
CC2P
rw
5
CC2E
rw
4
3
Reserved
2
CC1P
rw
1
RM0008
CC1E
rw
0