MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 517

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
Note:
clock is fixed by the requirements of the USB standard at 48 MHz, and this can be different
from the clock used for the interface to the APB1 bus. Different clock configurations are
possible where the APB1 clock frequency can be higher or lower than the USB peripheral
one.
Due to USB data rate and packet memory interface requirements, the APB1 clock frequency
must be greater than 8 MHz to avoid data overrun/underrun problems.
Each endpoint is associated with two packet buffers (usually one for transmission and the
other one for reception). Buffers can be placed anywhere inside the packet memory
because their location and size is specified in a buffer description table, which is also
located in the packet memory at the address indicated by the USB_BTABLE register. Each
table entry is associated to an endpoint register and it is composed of four 16-bit words so
that table start address must always be aligned to an 8-byte boundary (the lowest three bits
of USB_BTABLE register are always “000”). Buffer descriptor table entries are described in
the
Isochronous nor a double-buffered bulk, only one packet buffer is required (the one related
to the supported transfer direction). Other table locations related to unsupported transfer
directions or unused endpoints, are available to the user. isochronous and double-buffered
bulk endpoints have special handling of packet buffers (Refer to
transfers
between buffer description table entries and packet buffer areas is depicted in
Figure 191. Packet buffer areas with examples of buffer description table locations
Each packet buffer is used either during reception or transmission starting from the bottom.
The USB peripheral will never change the contents of memory locations adjacent to the
Section 21.5.3: Buffer descriptor
and
Section 21.4.3: Double-buffered endpoints
0001_1100 (1C)
0000_1100 (0C)
0001_1110 (1E)
0001_1010 (1A)
0000_1110 (0E)
0000_1010 (0A)
0001_1000 (18)
0001_0110 (16)
0001_0100 (14)
0001_0010 (12)
0001_0000 (10)
0000_1000 (08)
0000_0110 (06)
0000_0100 (04)
0000_0010 (02)
0000_0000 (00)
Buffer description table locations
COUNT3_TX_1
COUNT3_TX_0
COUNT2_RX_1
COUNT2_RX_0
ADDR3_TX_1
ADDR3_TX_0
ADDR2_RX_1
ADDR2_RX_0
COUNT1_RX
COUNT0_RX
COUNT1_TX
COUNT0_TX
ADDR1_RX
ADDR1_TX
ADDR0_RX
ADDR0_TX
Doc ID 13902 Rev 9
Universal serial bus full-speed device interface (USB)
table. If an endpoint is unidirectional and it is neither an
respectively). The relationship
OUT Endpoint 2
Reception buffer
double-buffered
double-buffered
single-buffered
IN Endpoint 3
Transmission
Transmission
Packet buffers
Endpoint 1
Endpoint 0
Buffer for
Buffer for
buffer for
Endpoint 0
buffer for
Section 21.4.4: Isochronous
for
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Figure
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191.