MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 222

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Analog-to-digital converter (ADC)
11.12.3
222/995
JEXTT
RIG
31
15
rw
30
14
rw
Bits 31:24
JEXTSEL[2:0]
Bits 4:0 AWDCH[4:0]: Analog watchdog channel select bits
Bit 23 TSVREFE: Temperature sensor and V
Bit 22 SWSTART: Start conversion of regular channels
Bit 21 JSWSTART: Start conversion of injected channels
ADC control register 2 (ADC_CR2)
Address offset: 0x08
Reset value: 0x0000 0000
29
13
rw
Note: ADC1 analog inputs Channel16 and Channel17 are internally connected to the
These bits are set and cleared by software. They select the input channel to be guarded by
the Analog watchdog.
00000: ADC analog input Channel0
00001: ADC analog input Channel1
....
01111: ADC analog input Channel15
10000: ADC analog input Channel16
10001: ADC analog input Channel17
Other values reserved.
Reserved, must be kept cleared.
This bit is set and cleared by software to enable/disable the temperature sensor and V
channel. In devices with dual ADCs this bit is present only in ADC1.
0: Temperature sensor and V
1: Temperature sensor and V
This bit is set by software to start conversion and cleared by hardware as soon as conversion
starts. It starts a conversion of a group of regular channels if SWSTART is selected as trigger
event by the EXTSEL[2:0] bits.
0: Reset state
1: Starts conversion of regular channels
This bit is set by software and cleared by software or by hardware as soon as the conversion
starts. It starts a conversion of a group of injected channels (if JSWSTART is selected as
trigger event by the JEXTSEL[2:0] bits.
0: Reset state
1: Starts conversion of injected channels
28
12
rw
Reserved
Res.
temperature sensor and to V
ADC2 analog inputs Channel16 and Channel17 are internally connected to V
ADC3 analog inputs Channel9, Channel14, Channel15, Channel16 and Channel17 are
connected to V
ALIGN
27
11
rw
26
10
Reserved
Res.
SS
25
9
.
Doc ID 13902 Rev 9
DMA
24
rw
REFINT
REFINT
8
REFINT
TSVRE
FE
REFINT
channel disabled
channel enabled
23
rw
7
, respectively.
SWST
ART
enable
22
rw
6
Reserved
Res.
JSWST
ART
21
rw
5
EXTT
RIG
20
rw
4
RST
CAL
19
rw
rw
3
EXTSEL[2:0]
CAL
18
rw
rw
2
CONT
17
rw
rw
1
SS
RM0008
.
REFINT
ADON
Res.
16
rw
0