MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 800
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 273. Bulk/control IN transactions
The sequence of operations is as follows:
a)
b)
c)
d)
e)
init _reg(ch_2)
read_rx_stsre
read_rx_sts
read_rx_fifo
read_rx_sts
read_rx_sts
De-allocate
set _ch_en
set _ch_en
set _ch_en
set _ch_en
ad_rx_fifo
Disable
(ch _2)
(ch _2)
(ch _2)
(ch _2)
(ch _2)
(ch _2)
Initialize channel 2.
Set the CHENA bit in HCCHAR2 to write an IN request to the non-periodic request
queue.
The core attempts to send an IN token after completing the current OUT
transaction.
The core generates an RXFLVL interrupt as soon as the received packet is written
to the receive FIFO.
In response to the RXFLVL interrupt, mask the RXFLVL interrupt and read the
received packet status to determine the number of bytes received, then read the
receive FIFO accordingly. Following this, unmask the RXFLVL interrupt.
11
13
1
1
2
7
7
9
2
5
5
Application
init_reg(ch _1)
write_tx_fifo
write_tx_fifo
De-allocate
(ch_1)
(ch_1)
(ch_1)
Doc ID 13902 Rev 9
RXFLVL interrupt
RXFLVL interrupt
RXFLVL interrupt
RXFLVL interrupt
CHH interrupt r
AHB
MPS
MPS
MPS
MPS
1
1
1
1
8
10
6
12
3
6
4
Host
ch_1
ch_2
ch_1
ch_2
ch_1
ch_2
ch_2
ch_2
ch_2
3
4
Non-Periodic Request
Queue
Assume that this queue
can hold 4 entries.
USB
Device
ai15675
RM0008
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