MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 304

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Advanced-control timers (TIM1&TIM8)
13.4.7
304/995
OC2
CE
15
rw
14
rw
Bits 14:12 OC2M[2:0]: Output Compare 2 mode
IC2F[3:0]
Bits 9:8 CC2S[1:0]: Capture/Compare 2 selection
OC2M[2:0]
TIM1&TIM8 capture/compare mode register 1 (TIMx_CCMR1)
Address offset: 0x18
Reset value: 0x0000
The channels can be used in input (capture mode) or in output (compare mode). The
direction of a channel is defined by configuring the corresponding CCxS bits. All the other
bits of this register have a different function in input and in output mode. For a given bit,
OCxx describes its function when the channel is configured in output, ICxx describes its
function when the channel is configured in input. So you must take care that the same bit
can have a different meaning for the input stage and for the output stage.
Output compare mode:
Bit 15 OC2CE: Output Compare 2 clear enable
Bit 11 OC2PE: Output Compare 2 preload enable
Bit 10 OC2FE: Output Compare 2 fast enable
Bit 7 OC1CE: Output Compare 1 clear enable
13
rw
Note: CC2S bits are writable only when the channel is OFF (CC2E = ‘0’ in TIMx_CCER).
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC2 channel is configured as output.
01: CC2 channel is configured as input, IC2 is mapped on TI2.
10: CC2 channel is configured as input, IC2 is mapped on TI1.
11: CC2 channel is configured as input, IC2 is mapped on TRC. This mode is working only if
an internal trigger input is selected through the TS bit (TIMx_SMCR register)
OC1CE: Output Compare 1 Clear Enable
0: OC1Ref is not affected by the ETRF Input
1: OC1Ref is cleared as soon as a High level is detected on ETRF input
12
rw
OC2
IC2PSC[1:0]
PE
11
rw
OC2
FE
10
rw
rw
9
CC2S[1:0]
Doc ID 13902 Rev 9
rw
8
OC1
CE
rw
7
rw
6
IC1F[3:0]
OC1M[2:0]
rw
5
rw
4
OC1
IC1PSC[1:0]
PE
rw
3
OC1
FE
rw
2
rw
1
CC1S[1:0]
RM0008
rw
0