MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 152

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

General-purpose and alternate-function I/Os (GPIOs and AFIOs)
8.3
8.3.1
Note:
8.3.2
Note:
152/995
1
2
Bits 15:0 LCKy: Port x Lock bit y (y= 0 .. 15)
Alternate function I/O and debug configuration (AFIO)
To optimize the number of peripherals available for the 64-pin or the 100-pin or the 144-pin
package, it is possible to remap some alternate functions to some other pins. This is
achieved by software, by programming the
(AFIO_MAPR) on page
their original assignations.
Using OSC32_IN/OSC32_OUT pins as GPIO ports PC14/PC15
The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general-purpose I/O
PC14 and PC15, respectively, when the LSE oscillator is off. The LSE has priority over the
GP IOs function.
The PC14/PC15 GPIO functionality is lost when the 1.8 V domain is powered off (by
entering standby mode) or when the backup domain is supplied by V
supplied). In this case the IOs are set in analog input mode.
Refer to the note on IO usage restrictions in
Using OSC_IN/OSC_OUT pins as GPIO ports PD0/PD1
The HSE oscillator pins OSC_IN/OSC_OUT can be used as general-purpose I/O PD0/PD1
by programming the PD01_REMAP bit in the
(AFIO_MAPR).
This remap is available only on 36-, 48- and 64-pin packages (PD0 and PD1 are available
on 100-pin and 144-pin packages, no need for remapping).
The external interrupt/event function is not remapped. PD0 and PD1 cannot be used for
external interrupt/event generation on 36-, 48- and 64-pin packages.
Bit 16 LCKK[16]: Lock key
Note: During the LOCK Key Writing sequence, the value of LCK[15:0] must not change.
Any error in the lock sequence will abort the lock.
This bit can be read anytime. It can only be modified using the Lock Key Writing Sequence.
0: Port configuration lock key not active
1: Port configuration lock key active. GPIOx_LCKR register is locked until an MCU reset
occurs.
LOCK key writing sequence:
Write 1
Write 0
Write 1
Read 0
Read 1 (this read is optional but confirms that the lock is active)
These bits are read write but can only be written when the LCKK bit is 0.
0: Port configuration not locked
1: Port configuration locked.
159. In this case, the alternate functions are no longer mapped to
Doc ID 13902 Rev 9
AF remap and debug I/O configuration register
Section 4.1.2 on page
AF remap and debug I/O configuration register
54.
BAT
(V
DD
no more
RM0008