MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 203
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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RM0008
11.3.7
Figure 26. Timing diagram
Analog watchdog
The AWD analog watchdog status bit is set if the analog voltage converted by the ADC is
below a low threshold or above a high threshold. These thresholds are programmed in the
12 least significant bits of the ADC_HTR and ADC_LTR 16-bit registers. An interrupt can be
enabled by using the AWDIE bit in the ADC_CR1 register.
The threshold value is independent of the alignment selected by the ALIGN bit in the
ADC_CR2 register. The comparison is done before the alignment (see
The analog watchdog can be enabled on one or more channels by configuring the
ADC_CR1 register as shown in
Figure 27. Analog watchdog guarded area
Table 61.
1. Selected by AWDCH[4:0] bits
None
All injected channels
All regular channels
All regular and injected channels
Single
Single
Single
ADC_CLK
SET ADON
Channels to be guarded by analog
EOC
ADC
ADC power on
(1)
(1)
(1)
injected channel
regular channel
regular or injected channel
Analog watchdog channel selection
watchdog
t
STAB
High threshold
Low threshold
Analog voltage
Start 1st conversion
Doc ID 13902 Rev 9
Table 61.
(total conv time)
Conversion Time
ADC Conversion
AWDSGL bit
ADC_CR1 register control bits (x = don’t care)
Guarded area
x
0
0
0
1
1
1
Analog-to-digital converter (ADC)
Software resets EOC bit
AWDEN bit
HTR
LTR
Start next conversion
0
1
1
0
1
0
1
Next ADC Conversion
Section
JAWDEN bit
11.5).
0
1
0
1
1
0
1
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