MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 822

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

USB on-the-go full-speed (OTG_FS)
822/995
IN data transfers
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This section describes how the application writes data packets to the endpoint FIFO in Slave
mode when dedicated transmit FIFOs are enabled.
1.
2.
The application can write multiple packets for the same endpoint into the transmit FIFO, if
space is available. For periodic IN endpoints, the application must write packets only for one
microframe. It can write packets for the next periodic transaction only after getting transfer
complete for the previous transaction.
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Internal data flow:
1.
2.
3.
4.
Application programming sequence:
Packet write
The application can either choose the polling or the interrupt mode.
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Using one of the above mentioned methods, when the application determines that
there is enough space to write a transmit packet, the application must first write into the
endpoint control register, before writing the data into the data FIFO. Typically, the
application, must do a read modify write on the OTG_FS_DIEPCTLx register to avoid
modifying the contents of the register, except for setting the Endpoint Enable bit.
Setting IN endpoint NAK
When the application sets the IN NAK for a particular endpoint, the core stops
transmitting data on the endpoint, irrespective of data availability in the endpoint’s
transmit FIFO.
Non-isochronous IN tokens receive a NAK handshake reply
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The core asserts the INEPNE (IN endpoint NAK effective) interrupt in
OTG_FS_DIEPINTx in response to the SNAK bit in OTG_FS_DIEPCTLx.
Once this interrupt is seen by the application, the application can assume that the
endpoint is in IN NAK mode. This interrupt can be cleared by the application by setting
the CNAK bit in OTG_FS_DIEPCTLx.
In polling mode, the application monitors the status of the endpoint transmit data
FIFO by reading the
space in the data FIFO.
In interrupt mode, the application waits for the TXFE interrupt (in
OTG_FS_DIEPINTx) and then reads the OTG_FS_DTXFSTSx register, to
determine if there is enough space in the data FIFO.
To write a single non-zero length data packet, there must be space to write the
entire packet in the data FIFO.
To write zero length packet, the application must not look at the FIFO space.
Isochronous IN tokens receive a zero-data-length packet reply
OT
Doc ID 13902 Rev 9
G_FS_DTXFSTSx register, to determine if there is enough
RM0008