MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 169
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 169 of 995
- Download datasheet (9Mb)
RM0008
9
9.1
9.1.1
9.1.2
Interrupts and events
Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
High-density devices are STM32F101xx and STM32F103xx microcontrollers where the
Flash memory density ranges between 256 and 512 Kbytes.
Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
This Section applies to the whole STM32F10xxx family, unless otherwise specified.
Nested vectored interrupt controller (NVIC)
Features
●
●
●
●
●
The NVIC and the processor core interface are closely coupled, which enables low latency
interrupt processing and efficient processing of late arriving interrupts.
All interrupts including the core exceptions are managed by the NVIC. For more information
on exceptions and NVIC programming see Chap 5 Exceptions & Chap 8 Nested Vectored
Interrupt Controller of the ARM Cortex™-M3 Technical Reference Manual.
SysTick calibration value register
The SysTick calibration value is fixed to 9000, which gives a reference time base of 1 ms
with the SysTick clock set to 9 MHz (max HCLK/8).
Interrupt and exception vectors
Table 52
devices, respectively.
Table 52.
68 maskable interrupt channels (not including the 16 interrupt lines of Cortex™-M3)
16 programmable priority levels (4 bits of interrupt priority are used)
Low-latency exception and interrupt handling
Power management control
Implementation of System Control Registers
-3
-2
-
and
Type of
priority
fixed
fixed
Vector table for connectivity line devices
Table 53
-
-
Reset
NMI
are the vector tables for connectivity line and other STM32F10xxx
Acronym
Doc ID 13902 Rev 9
Reserved
Reset
Non maskable interrupt. The RCC
Clock Security System (CSS) is
linked to the NMI vector.
Description
Interrupts and events
0x0000_0000
0x0000_0004
0x0000_0008
Address
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