MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 416

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Flexible static memory controller (FSMC)
19.5.2
416/995
Table 91.
PSRAM memories are addressed in 16-bit words. The maximum capacity is 512 Mbit (26
address lines).
Supported memories and transactions
Table 92
Transactions not allowed (or not supported) by the FSMC appear in gray.
Table 92.
NE[x]
NOE
NWE
NL(= NADV)
NWAIT
NBL[1]
NBL[0]
FSMC signal name
and nonmuxed
(muxed I/Os
NOR Flash
Device
I/Os)
below displays the supported devices, access modes and transactions.
Non muxed I/Os PSRAM (continued)
NOR Flash/PSRAM supported memories and transactions
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
page
Synchronous
Synchronous
Synchronous
Mode
I/O
O
O
O
O
O
O
I
Chip select, x = 1..4 (called NCE by PSRAM (Cellular RAM i.e. CRAM))
Output enable
Write enable
Address valid PSRAM input (memory signal name: NADV)
PSRAM wait input signal to the FSMC
Upper byte enable (memory signal name: NUB)
Lowed byte enable (memory signal name: NLB)
Doc ID 13902 Rev 9
R/W
W
W
W
R
R
R
R
R
R
R
AHB
data
size
16
16
32
32
16
32
8
8
8
-
data size
Memory
16
16
16
16
16
16
16
16
16
16
Function
Y
N
Y
Y
Y
Y
N
N
Y
Y
Allowed/
allowed
not
Split into 2 FSMC
accesses
Split into 2 FSMC
accesses
Mode is not supported
Comments
RM0008

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