MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 604

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Serial peripheral interface (SPI)
604/995
LSB justified standard
This standard is similar to the MSB justified standard (no difference for the 16-bit and 32-bit
full-accuracy frame formats).
Figure 221. LSB justified 16-bit or 32-bit full-accuracy with CPOL = 0
Figure 222. LSB Justified 24-bit frame length with CPOL = 0
Figure 223. Operations required to transmit 0x3478AE
In transmission mode:
If data 0x3478AE have to be transmitted, two write operations to the SPI_DR register
are required from software or by DMA. The operations are shown below.
In reception mode:
If data 0x3478AE are received, two successive read operations from SPI_DR are
required on each RXNE event.
CK
SD
WS
CK
SD
WS
Only the 8 LSB bits of the half-word
are significant. Whatever the 8 MSBs
a field of 0x00 is forced instead
First write to Data register
conditioned by TXE = ‘1’
MSB
Transmission
0xXX34
8-bit data
0 forced
May be 16-bit, 32-bit
Doc ID 13902 Rev 9
Channel left
Channel left 32-bit
Reception
MSB
Transmission
24-bit remaining
Second write to Data register
conditioned by TXE = ‘1’
LSB MSB
0x78AE
LSB
Reception
Channel right
Channel right
RM0008

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