MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 696

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

USB on-the-go full-speed (OTG_FS)
26.2.3
26.3
26.3.1
696/995
Peripheral-mode features
The OTG_FS interface:
●
●
●
●
●
●
OTG_FS functional description
Figure 260. Block diagram
OTG full-speed core
The USB OTG FS receives the 48 MHz ±0.25% clock from the reset and clock controller
(RCC), via an external quartz. The USB clock is used for driving the 48 MHz domain at full-
speed (12 Mbit/s) and must be enabled prior to configuring the OTG FS Core.
The CPU reads and writes from/to the OTG FS Core registers through the AHB peripheral
bus. It is informed of USB events through the single USB OTG interrupt line described in
Section 26.13: OTG_FS
The CPU submits data over the USB by writing 32-bit words to dedicated OTG_FS locations
(push registers). The data are then automatically stored into Tx-data FIFOs configured
has 1 bidirectional control endpoint0
has 3 IN endpoints (EPs) configurable to support Bulk, Interrupt or Isochronous
transfers
has 3 OUT endpoints configurable to support Bulk, Interrupt or Isochronous transfers
manages a shared Rx FIFO and a Tx-OUT FIFO for efficient usage of the USB data
RAM
manages up to 4 dedicated Tx-IN FIFOs (one for each active IN EP) to put less load on
the application
supports the soft disconnect feature
Power&
Clock
CTRL
USB Clock at 48 MHz
USB duspend
interrupts.
Doc ID 13902 Rev 9
1.25 Kbytes
USB data
FIFOs
USB2.0
OTG FS
Core
Cortex-M3
System clock
domain
USB Interrupt
USB clock
domain
UTMIFS
OTG
FS
PHY
Universal serial bus
DP
DM
ID
V
BUS
ai17106
RM0008