MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 125

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
7.3.6
ETHM
ACTX
EN
31
15
rw
ETHM
ACEN
30
14
rw
Bits 31:17 Reserved, always read as 0.
Bits 11:7 Reserved, always read as 0.
AHB Peripheral Clock enable register (RCC_AHBENR)
Address offset: 0x14
Reset value: 0x0000 0014
Access: no wait state, word, half-word and byte access
Bit 16 ETHMACRXEN: Ethernet MAC RX clock enable
Bit 15 ETHMACTXEN: Ethernet MAC TX clock enable
Bit 14 ETHMACEN: Ethernet MAC clock enable
Bit 13 Reserved, always read as 0.
Bit 12 OTGFSEN: USB OTG FS clock enable
Bit 6 CRCEN: CRC clock enable
Bit 5 Reserved, always read as 0.
Res.
29
13
Note: In the RMII mode, if this clock is enabled, the RMII clock of the MAC is also enabled.
Note: In the RMII mode, if this clock is enabled, the RMII clock of the MAC is also enabled.
OTGF
SEN
Set and cleared by software.
0: Ethernet MAC RX clock disabled
1: Ethernet MAC RX clock enabled
Set and cleared by software.
0: Ethernet MAC TX clock disabled
1: Ethernet MAC TX clock enabled
Set and cleared by software. Selection of PHY interface (MII/RMII) must be done before
enabling the MAC clock.
0: Ethernet MAC clock disabled
1: Ethernet MAC clock enabled
Set and cleared by software.
0: USB OTG FS clock disabled
1: USB OTG FS clock enabled
Set and cleared by software.
0: CRC clock disabled
1: CRC clock enabled
28
12
rw
27
11
26
10
Reserved
25
9
Doc ID 13902 Rev 9
Connectivity line devices: reset and clock control (RCC)
Reserved
24
8
23
7
CRCEN
22
rw
6
Res.
21
5
FLITFE
20
rw
N
4
Res.
19
3
SRAM
EN
18
rw
2
DMA2
EN
17
rw
1
125/995
MACR
DMA1
XEN
ETH
EN
16
rw
rw
0