MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 68

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Backup registers (BKP)
5.4
5.4.1
5.4.2
68/995
15
15
rw
14
14
rw
Bits 15:10 Reserved, always read as 0.
Bits 15:0 D[15:0] Backup data
BKP registers
Refer to
Backup data register x (BKP_DRx) (x = 1 ..42)
Address offset: 0x04 to 0x28, 0x40 to 0xBC
Reset value: 0x0000 0000
RTC clock calibration register (BKP_RTCCR)
Address offset: 0x2C
Reset value: 0x0000 0000
Bit 9 ASOS: Alarm or second output selection
Bit 8 ASOE: Alarm or second output enable
Bit 7 CCO: Calibration clock output
13
rw
13
Reserved
Note: The BKP_DRx registers are not reset by a System reset or Power reset or when the
Note: This bit is reset only by a Backup domain reset.
Note: This bit is reset only by a Backup domain reset.
Note: This bit is reset when the V
These bits can be written with user data.
When the ASOE bit is set, the ASOS bit can be used to select whether the signal output on
the TAMPER pin is the RTC Second pulse signal or the Alarm pulse signal:
0: RTC Alarm pulse output selected
1: RTC Second pulse output selected
Setting this bit outputs either the RTC Alarm pulse signal or the Second pulse signal on the
TAMPER pin depending on the ASOS bit.
The output pulse duration is one RTC clock period. The TAMPER pin must not be enabled
while the ASOE bit is set.
0: No effect
1: Setting this bit outputs the RTC clock with a frequency divided by 64 on the TAMPER pin.
The TAMPER pin must not be enabled while the CCO bit is set in order to avoid unwanted
Tamper detection.
Section 1.1 on page 37
12
rw
12
device wakes up from Standby mode.
They are reset by a Backup Domain reset or by a TAMPER pin event (if the TAMPER
pin function is activated).
11
rw
11
10
rw
10
ASOS
rw
rw
9
9
Doc ID 13902 Rev 9
for a list of abbreviations used in register descriptions.
ASOE
rw
rw
8
8
D[15:0]
DD
supply is powered off.
CCO
rw
rw
7
7
rw
rw
6
6
rw
rw
5
5
rw
rw
4
4
CAL[6:0]
rw
rw
3
3
rw
rw
2
2
rw
rw
1
1
RM0008
rw
0
rw
0