MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 918
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Ethernet (ETH): media access control (MAC) with DMA controller
918/995
AE SA
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
rw rw rw rw rw rw rw rw
Bits 30:16 Reserved
Bits 15:0 MACA0H: MAC address0 high [47:32]
Bits 31:0 MACA0L: MAC address0 low [31:0]
Bit 31 MO: Always 1.
Ethernet MAC address 0 low register (ETH_MACA0LR)
Address offset: 0x0044
Reset value: 0xFFFF FFFF
The MAC address 0 low register holds the lower 32 bits of the 6-byte first MAC address of
the station.
Ethernet MAC address 1 high register (ETH_MACA1HR)
Address offset: 0x0048
Reset value: 0x0000 FFFF
The MAC address 1 high register holds the upper 16 bits of the 6-byte second MAC address
of the station.
Bit 31 AE: Address enable
Bit 30 SA: Source address
MBC
This field contains the upper 16 bits (47:32) of the 6-byte MAC address0. This is used by the
MAC for filtering for received frames and for inserting the MAC address in the transmit flow
control (Pause) frames.
This field contains the lower 32 bits of the 6-byte MAC address0. This is used by the MAC for
filtering for received frames and for inserting the MAC address in the transmit flow control
(Pause) frames.
When this bit is set, the address filters use the MAC address1 for perfect filtering. When this bit
is cleared, the address filters ignore the address for filtering.
When this bit is set, the MAC address1[47:0] is used for comparison with the SA fields of the
received frame.
When this bit is cleared, the MAC address1[47:0] is used for comparison with the DA fields of
the received frame.
Reserved
Doc ID 13902 Rev 9
MACA0L
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
9
9
MACA1H
8
8
7
7
6
6
5
5
4
4
3
3
RM0008
2
2
1
1
0
0
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