MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 708

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

USB on-the-go full-speed (OTG_FS)
26.7
708/995
entries) = 512 bytes of USB bulk traffic can be scheduled by the application and
autonomously executed by the host at the maximum full-speed data rate without any
application intervention.
●
●
SOF trigger
Figure 264. SOF connectivity
To post an out periodic (nonperiodic) transaction request to the host scheduler the
application has to:
–
–
–
–
–
To post an IN periodic (nonperiodic) transaction request to the host scheduler the
application has to:
–
–
configure the transfer parameters on an available host channel
enable the configured channel
check that there is at least 1 entry available in the periodic (nonperiodic) request
queue by reading the HPTXSTS bit in the OTG_FS_GNPTXSTS register
check that there is enough FIFO space in the periodic (nonperiodic) Tx FIFO (see
Section 26.11.2: Host Tx
This step may not be necessary if the application submits the host transaction
request upon reception of the periodic (nonperiodic) Tx FIFO half or completely
empty interrupt
push the data payload to the associated FIFO address (push register). There is
one push register for each enabled host channel. The data payload is
automatically redirected to the periodic or nonperiodic Tx FIFO according to the
host channel EPTYP bitfield in the OTG_FS_HCCHARx register. When the last
32-bit word data are written to the FIFO, an active entry is inserted at the bottom of
the periodic (nonperiodic) request queue and the transaction request is scheduled
for execution
configure the transfer parameters on an available host channel
enable the configured channel with the channel enable bit in the host channel
characteristics register (CHENA bit in OTG_FS_HCCHARx). This inserts an active
entry at the bottom of the periodic (nonperiodic) request queue and the
transaction request is scheduled for execution
STM32F105xx
STM32F107xx
TIM2
ITR1
SOF
pulse
SOFgen
Doc ID 13902 Rev 9
FIFOs) by reading the HPTXSTS (GNPTXSTS) register.
PA8
PA9
PA11
PA12
PA10
SOF pulse output, to
external audio control
VBUS
V
D
D
ID
SS
-
+
ai17120
RM0008