MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 60

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Power control (PWR)
4.3.5
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In Stop mode, the following features can be selected by programming individual control bits:
●
●
●
●
The ADC or DAC can also consume power during the Stop mode, unless they are disabled
before entering it. To disable them, the ADON bit in the ADC_CR2 register and the ENx bit
in the DAC_CR register must both be written to 0.
Exiting Stop mode
Refer to
When exiting Stop mode by issuing an interrupt or a wakeup event, the HSI RC oscillator is
selected as system clock.
When the voltage regulator operates in low-power mode, an additional startup delay is
incurred when waking up from Stop mode. By keeping the internal regulator ON during Stop
mode, the consumption is higher although the startup time is reduced.
Table 11.
Standby mode
The Standby mode allows to achieve the lowest power consumption. It is based on the
Cortex-M3 deepsleep mode, with the voltage regulator disabled. The 1.8 V domain is
consequently powered off. The PLL, the HSI oscillator and the HSE oscillator are also
Mode entry
Mode exit
Wakeup latency
Independent watchdog (IWDG): the IWDG is started by writing to its Key register or by
hardware option. Once started it cannot be stopped except by a Reset. See
Section 17.3
real-time clock (RTC): this is configured by the RTCEN bit in the
register (RCC_BDCR)
Internal RC oscillator (LSI RC): this is configured by the LSION bit in the
register
External 32.768 kHz oscillator (LSE OSC): this is configured by the LSEON bit in the
Backup domain control register
Stop mode
Table 11
Stop mode
(RCC_CSR).
for more details on how to exit Stop mode.
in
Section 17: Independent watchdog
WFI (Wait for Interrupt) or WFE (Wait for Event) while:
– Set SLEEPDEEP bit in Cortex™-M3 System Control register
– Clear PDDS bit in Power Control register (PWR_CR)
– Select the voltage regulator mode by configuring LPDS bit in PWR_CR
Note: To enter Stop mode, all EXTI Line pending bits (in
(EXTI_PR)) and RTC Alarm flag must be reset. Otherwise, the Stop mode
entry procedure is ignored and program execution continues.
If WFI was used for entry:
If WFE was used for entry:
HSI RC wakeup time + regulator wakeup time from Low-power mode
Any EXTI Line configured in Interrupt mode (the corresponding EXTI
Interrupt vector must be enabled in the NVIC). Refer to
table for other STM32F10xxx devices on page
Any EXTI Line configured in event mode. Refer to
event management on page 175
Doc ID 13902 Rev 9
(RCC_BDCR).
Description
(IWDG).
172.
Backup domain control
Section 9.2.3: Wakeup
Pending register
Table 53: Vector
Control/status
RM0008