MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 216

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Analog-to-digital converter (ADC)
11.9.9
Note:
216/995
Figure 39. Alternate + Regular simultaneous
If a trigger occurs during an injected conversion that has interrupted a regular conversion, it
will be ignored.
Figure 40. Case of trigger occurring during injected conversion
Combined injected simultaneous + interleaved
It is possible to interrupt an interleaved conversion with an injected event. In this case the
interleaved conversion is interrupted and the injected conversion starts, at the end of the
injected sequence the interleaved conversion is resumed.
using an example.
When the ADC clock prescaler is set to 4, the interleaved mode does not recover with
evenly spaced sampling periods: the sampling interval is 8 ADC clock periods followed by 6
ADC clock periods, instead of 7 clock periods followed by 7 clock periods.
Figure 41. Interleaved single channel with injected sequence CH11, CH12
ADC1 inj
ADC1 reg
ADC1 inj
ADC2 reg
ADC1 reg
ADC2 inj
ADC2 reg
ADC2 inj
ADC1
ADC2
CH0
CH3
CH0
CH3
Figure 40
CH0
CH1
CH5
CH1
CH5
CH0
shows the behavior in this case (2nd trig is ignored).
CH0
1st trig
1st trig
Doc ID 13902 Rev 9
CH2
CH6
CH2
CH6
Trigger
2nd trig
CH0
CH0
CH0
CH0
CH0
CH11
CH12
CH6
CH2
CH6
CH2
2nd trig
3rd trig
CH7
CH3
CH7
CH3
CH12
CH11
CH0
CH0
Figure 41
CH0
CH7
CH3
CH7
CH3
synchro not lost
shows the behavior
CH0
Sampling
Conversion
4th trig
CH0
CH8
CH4
CH8
CH4
CH0
CH0
RM0008

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