MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 707

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
26.6.4
corresponding bits in the HAINT and GINTSTS registers. The mask bits for each interrupt
source of each channel are also available in the OTG_FS_HCINTMSK-x register.
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Host scheduler
The host core features a built-in hardware scheduler able to autonomously re-order and
drive over the USB the transaction requests posted by the application. At the beginning of
each frame the host executes the periodic (isochronous and interrupt) traffic first, followed
by the nonperiodic (control and bulk) traffic to accomplish the higher level of priority granted
to the isochronous and interrupt transfer types by the USB specification.
The host pipes the USB transactions through request queues (one for periodic and one for
nonperiodic). Each request queue can hold up to 8 entries. Each entry represents a pending
transaction request from the application. Each entry in the request queue holds the IN or
OUT channel number along with other information to perform a transaction on the USB. The
order in which the requests are written into the queue determines the sequence of the
transactions on the USB. The host processes the periodic request queue first, followed by
the nonperiodic request queue, at the beginning of each frame. The host issues an
incomplete periodic transfer interrupt (IPXFR bit in OTG_FS_GINTSTS) if an isochronous or
interrupt transaction scheduled for the current frame is still pending at the end of the current
frame.
The management of the periodic and nonperiodic request queues is completely in the hands
of the OTG FS Core. A read-only register is available for the application to read the status of
each request queue:
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As request queues can hold a maximum of 8 entries each, the application can push to
schedule host transactions in advance with respect to the moment they physically reach the
USB for a maximum of 8 pending periodic transactions plus 8 pending nonperiodic
transactions. For example, for a bulk in/out transfer, up to 64 (max bulk packet size) × 8 (max
The host core provides the following status checks and interrupt generation:
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Periodic transmit FIFO and queue status register (HPTXSTS) and non periodic transmit
FIFO and queue status register (GNPTXSTS), containing the:
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transfer completed interrupt, indicating that the data transfer is complete on both
the application (AHB) and USB sides
channel has stopped due to transfer completed, USB transaction error or disable
command from the application
associated transmit FIFO is half or completely empty (IN endpoints)
ACK response received
NAK response received
STALL response received
USB transaction error due to CRC failure, timeout, bit stuff error, false EOP
babble error
frame overrun
data toggle error
number of free entries currently available in the periodic (non periodic) request
queue (8 max)
free space currently available in the periodic (nonperiodic) Tx-FIFO (out-
transactions)
IN/OUT token, host channel number and other status information
Doc ID 13902 Rev 9
USB on-the-go full-speed (OTG_FS)
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